Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory, among others.
Flash memory devices are utilized as non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption.
Uses for flash memory include memory for personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data, such as a basic input/output system (BIOS), are typically stored in flash memory devices. This information can be used in personal computer systems, among others.
Two common types of flash memory array architectures are the “NAND” and “NOR” architectures, so called for the logical form in which the basic memory cell configuration of each is arranged
A NAND array architecture arranges its array of floating gate memory cells in a matrix such that the gates of each floating gate memory cell of the array are coupled by rows to select lines. However each memory cell is not directly coupled to a column sense line by its drain. Instead, the memory cells of the array are coupled together in series, source to drain, between a source line and a column sense line.
Memory cells in a NAND array architecture can be programmed to a desired state. That is, electric charge can be placed on or removed from the floating gate of a memory cell to put the cell into a number of stored states. For example, a single level cell (SLC) can represent two digit, e.g., binary, states, e.g., 1 or 0. Flash memory cells can also store more than two digit states, e.g., 1111, 0111, 0011, 1011, 1001, 0001, 0101, 1101, 1100, 0100, 0000, 1000, 1010, 0010, 0110, and 1110. Such cells may be referred to as multi state memory cells, multidigit cells, or multilevel cells (MLCs). MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can represent more than one digit, e.g., bit. MLCs can have more than one programmed state, e.g., a cell capable of representing four digits can have sixteen programmed states. For some MLCs, one of the sixteen programmed states can be an erased state. For these MLCs, the lowermost program state is not programmed above the erased state, that is, if the cell is programmed to the lowermost state, it remains in the erased state rather than having a charge applied to the cell during a programming operation. The other fifteen states can be referred to as “non-erased” states.
Sensing operations, such as read operations and program verify operations, can involve applying a potential to a control gate of a selected memory cell and determining whether or not the cell conducts according to a sense line current. For MLCs, such a sensing operation can require the application of multiple potentials. For example, an MLC capable of being programmed to sixteen states can require the application of fifteen different potentials to a control gate to sense the state of the cell. Each potential applied to the control gate is applied for a period of time, for example, 10 to 20 microseconds, while the line carrying the current settles. For a cell requiring the application of fifteen sensing potentials, the result can include a 300 microsecond sensing time.
Other sensing operations employing the use of a voltage ramp, rather than discrete sensing voltages, can result in erroneous results due to variations in ramp rate and distortions in ramp value that can occur with process cycling and changing temperature. As voltage is applied to a control gate of a selected memory cell, an amount of time is required for the cell to conduct. If a voltage ramp increases too quickly, the selected cell may not have time to conduct charge sufficient to trip a sense amplifier before the voltage ramp reaches a higher level corresponding to a higher program state. In such a situation, a sensing operation could erroneously report that the cell has been programmed to a higher state.